1. Field of the Invention
The present invention generally relates to integrated circuits and, more particularly, to memory devices configured to reduce coupling noise between adjacent wordlines in a memory array.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art, which may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
A wide variety of integrated circuit devices are available for storing data in systems such as computer systems. One type of commonly used memory device is a Dynamic Random Access Memory (DRAM) device. A DRAM memory cell typically includes an access device, such as a transistor, coupled to a storage device, such as a capacitor. The access device allows the transfer of charge to and from the storage capacitor. The data is stored in a binary format; a logical “1” is stored as a charged a capacitor, and a logical “0” is stored as a discharged capacitor. A typical DRAM device is arranged in a plurality of addressable rows and columns which form a memory array. To access a memory cell, a particular row or “wordline” and a particular column or “bitline” may be implemented.
With the constantly increasing demand for higher data storage capacity, memory arrays are becoming more dense. Memory density is typically limited by current processing technologies used for fabrication of the memory arrays. Disadvantageously, as the density of memory arrays increase, other aspects of the memory array, such as electrical characteristics, may also be affected. For instance, coupling noise between adjacent wordlines may have a greater impact on device performance as the device density increases. Disadvantageously, the increased coupling noise between adjacent wordlines may negatively impact device performance and increase current leakage as well as the occurrence of soft errors which may alter the data storage in the memory cells.
Embodiments of the present invention may address one or more of the problems set forth above.